1. Field of the Invention
Embodiments of the present invention relate generally to management of external enclosures and more specifically to implementing a serial enclosure management interface for a computer system.
2. Description of the Related Art
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
The mass storage of a computer system, especially a server system, sometimes resides in an external enclosure for reasons such as redundancy, security, and expandability. FIG. 1A is a conceptual diagram of a computer system connecting to such an external storage unit. Specifically, computer system 100 includes at least one Serial Attached Small Computer System Interface (“SAS) and/or Serial Advanced Technology Attachment (“SATA”) controller 102, which provides point-to-point connections between computer system 100 and the hard drives in external enclosure 104, such as hard drives 110 and 112, via SAS/SATA cables. SAS/SATA controller 102 also supports a serialized general purpose input output (“SGPIO”) interface that is compliant with the SFF-8485 specification. This SGPIO interface enables computer system 100 to interact with external enclosure 104 with respect to light emitted diode (“LED”) control, device information, and other general purpose data relating to the hard drives. In particular, SAS/SATA controller 102 sends certain bit patterns to an LED management component of external enclosure 104, such as SGPIO controller 108 on printed circuit board (“PCB”) 106, to drive the LEDs of hard drives 110 and 112. As is well-known, the bit patterns correspond to certain pre-defined conditions of the hard drives 110 and 112, such as the configuration and activity, the identification and the operability of the drives. The current operating condition of the drives is thus reflected by the LED display associated with each drive. It is worth noting that the number of SGPIO interfaces that SAS/SATA controller 102 supports is fixed and cannot be expanded without hardware modifications.
FIG. 1B is a conceptual diagram of the SGPIO bus discussed above, which carries four types of signals: SClock, SLoad, SDataOut, and SDataIn. An initiator, in this case SAS/SATA controller 102, sends the aforementioned bit patterns to target, in this case SGPIO controller 108, via the SDataOut signal. More specifically, pursuant to the SFF-8485 specification, SAS/SATA controller 102 serially and continuously transmits 3-bit patterns for each of the hard drives in external enclosure 104. Thus, there is a first 3-bit pattern for hard drive 110, a second 3-bit pattern for hard drive 112, etc. After SAS/SATA controller 102 transmits the last 3-bit pattern to the last hard drive in external enclosure 104, SAS/SATA controller 102 starts transmitting the first 3-bit pattern to hard drive 110 again. The device driver for SAS/SATA controller 102 generally uses the “bit-banging” technique to emulate a serial communication interface and place the aforementioned bit patterns on the SGPIO bus. However, this software implementation generally incurs significant CPU overhead by frequently resetting and reloading bit patterns and generating interrupts, thereby reducing overall system performance.
As the foregoing illustrates, what is needed is a more efficient approach to managing the bit patterns transmitted to storage devices residing in an external enclosure in a computer system.